Posted: Tuesday, March 14, 2017 4:29 PM
Req Id: 75722
As a NVE Design Engineer at Micron Technology, Inc., you will be responsible for designing and analyzing analog and mixed circuits, or logic circuits, used in the development of memory products. This includes designing, simulating, optimizing, and floor planning NAND circuits. In this position you will work and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products to optimize all manufacturing functions and assure the best cost, quality, reliability, time:to:market, and customer satisfaction. You will also be responsible for parasitic modeling and assisting in design validation, reticule experiments and required tape:out revisions.
Responsibilities and Tasks
:Contribute to the Development of New Memory Products by Assisting With the Overall Design, Layout, and Optimization of Memory Circuits.
:Evaluate design feasibility and analyze circuit functionalities
:Implement analog and mixed signal circuit design, or logic circuit design, to meet specifications
:Validate design performance and functionalities by running block and chip level simulations using standard industry simulators
:Responsible for parasitic modeling and layout extraction
:Document and review final results with experts and stakeholders
:Ability to interpret device specification to produce required functionality
:Assist in silicon design validation, reticule experiments, and tape:out revisions as needed
Work towards Standardization and Group Success
:Develop circuit blocks to ensure standardization across products
:Perform silicon versus schematic versus layout verification of required circuits
:Work with multiple project teams and CAD teams
:Must be self:motivated and have good written communication and teamwork skills
:Strong problem solving and analytical skills
:Good fundamental in semiconductor and device physics
:Able to work both independently and as part of cross:functional team
:Good organization and planning skills
:BSEE minimum,must be pursuing a MS or PhD in EE
:Must be continuing education in Fall of 2016 (Expected graduation date must not be before September 1st 2016)
We recruit, hire, train, promote, discipline and provide other conditions of employment without regard to a persons race, color, religion, sex, age, national origin, disability, sexual orientation, gender identity and expression, pregnancy, veteran's status, or other classifications protected under law. This includes providing reasonable accommodation for team members disabilities or religious beliefs and practices.
Each manager, supervisor and team member is responsible for carrying out this policy. The EEO Administrator in Human Resources is responsible for administration of this policy. The administrator will monitor compliance and is available to answer any questions on EEO matters.
To request assistance with the application process, Micron's Human Resources Department at (or
Keywords: Folsom California (US:CA) United States (US) NVE (Non:Volatile Engineering Group) Entry Internship Engineering Not Applicable
• Location: Sacramento
• Post ID: 13763431 sacramento